[-] PaX@hexbear.net 64 points 3 months ago

doomjak The iron law of "nothing ever happens" necessitates this

spoilerNah but for real how much life can this bubble still have left?

[-] PaX@hexbear.net 86 points 3 months ago* (last edited 3 months ago)

Good, please take the entire fake industry with you

No offense to the AI researchers here (actually maybe only one person lol), but the people who lead/make profit off of/fundraise off of your efforts now are demons

[-] PaX@hexbear.net 55 points 4 months ago* (last edited 4 months ago)

Bring back /r/ShitHexbearSays

StrappingYoungVlad, where did you go? Look, I'll even make it easy for you:

October 7th was justified and good, Hamas is good and the legitimate representatives of the Palestinian people and their national liberation struggle from """Israeli""" settler-colonialism, you shouldn't vote for the genocide party (Democrats), anti-cracker racism isn't real but if it was it would be good, unlimited destruction on the first world, political violence is justified, Stalin was 70% good and 30% bad, uhhhh anyone got any others for the screenshot?

[-] PaX@hexbear.net 72 points 4 months ago* (last edited 4 months ago)

Holy fuck, that was just straight murder

She was making some kind of joke or something after the cops started ordering her around, then the cops interpreted it as some kind of threat ????? and pulled their guns

Her last words in the video were "I'm sorry"

I am in tears this is so fucked up :(

[-] PaX@hexbear.net 64 points 4 months ago

Let this incident be a reminder of how supremely funny it would be if we had another late 90s, early 2000s type internet worm and all it did was show a silly message and consume all available resources to spread itself

sicko-wistful

Okay I don't post in this thread often so idk the line between shitposting/goodposting here so here's an actual thing that's concerning that makes this more serious:

If we ever get into a real cyberwar, we are so immensely cooked

One company fucks up an update and this happens

[-] PaX@hexbear.net 53 points 4 months ago* (last edited 4 months ago)

https://cybersecuritynews.com/crowdstrike-update-bsod-loop/

DRIVER_OVERRAN_STACK_BUFFER

farquaad-point The security program overflowed its own buffer!

[-] PaX@hexbear.net 54 points 4 months ago

Same here

I just think it's extremely funny to pretend to be a tankie online and that's all I've been doing

[-] PaX@hexbear.net 53 points 5 months ago

socialism-beer If heterosexuality was a beer πŸ˜‚πŸ˜‚πŸ˜‚

[-] PaX@hexbear.net 71 points 7 months ago* (last edited 7 months ago)

jesse-wtf

Bot found a keyword?

Although it's reddit-logo and those people are so rabidly anticommunist it could easily just be another redditor

Who knows, the bots and the smuglord act like one force at this point, anyone who cares already left or never participated in this anyway

Edit: also do you have a copy with the usernames intact?

[-] PaX@hexbear.net 53 points 8 months ago

Cheating opsec lmao

14
submitted 9 months ago by PaX@hexbear.net to c/hardware@lemmy.ml

cross-posted from: https://hexbear.net/post/1747735

CPU-posting on main

MTI = MIPS Technologies (company that made MIPS (Microprocessor without Interlocked Pipeline Stages) processors, they make RISC-V processors now lmao)

At the time when the MIPS R10000, known as the "T5" while in development, was being designed, MTI had made a name for themselves as designers of high-performance computer microprocessors along the lines of the then-new philosophy of reduced instruction set computing (RISC). Actually, their R2000 design was the first commercially-available RISC microprocessor. By the time the T5 was being designed, they were no longer alone in the RISC microprocessor market. Several companies, including IBM and Motorola (joined together in the AIM alliance which produced PowerPC), DEC (who designed the Alpha line of RISC microprocessors after MTI owned them in the 80s when their radically simpler chips were performing better than VAXen), and Sun Microsystems (who were making the SPARC line of microprocessors) were now marketing RISC microprocessors. Not just even marketing but beating MTI in the market they had created. After trying and failing to develop their own complete computer systems alongside their chips, they were having financial difficulties until Silicon Graphics acquired MTI to secure availability of MIPS microprocessors for their famous ("it's a Unix system, I know this!") MIPS-based workstations and servers. Although their new (in 1993) R4000 and R4400 designs performed well compared to their contemporaries, they were quickly being made obsolete by MTI's competitor's new offerings and they were left with a problem:

The MIPS R4000 and the R4400, which is essentially an R4000 with bigger on-die caches, were more or less just an architectural evolution from the R2000. The R4000 made its performance in much the same way as the R2000 did, the classic RISC design process mantra: "let's make it simpler" and thus be able to run it faster. In particular, what this means for the R4000, and what is a key difference from its predecessors and its contemporaries, is a technique called superpipelining. In an instruction pipeline, the maximum speed at which your processor can issue instructions is set by the pipeline stage which takes the longest to complete. Superpipelining is one way of addressing this problem: you can subdivide each pipeline stage into 2 simpler pipeline stages that individually complete faster and thus be able to clock your chip faster without problems. However, this has its limits. Eventually, it becomes impossible to further "deepen" the pipeline like this or clock the processor faster in general without other problems. This is why MTI's competitors opted for the analogous superscalar approach: you can duplicate functional units of your processor and have multiple instructions "in flight" at the same time and usually this also involves multiple pipelines. At the time MTI thought this approach would result in more consistently higher performance (not to mention save die space) but were quickly proven wrong when their competitor's superscalar (and often with other architectural tricks) chips were outperforming the R4000 in spite of MTI's fabrication partners constantly improving their process and releasing chips that ran at higher and higher speeds.

Enter the MIPS R8000 (die not pictured here) in 1994, a weird and expensive 6-chip 4-way superscalar design meant for the high-end microprocessor market while the next-generation T5 (which would become the MIPS R10000, as mentioned earlier) was under development. It didn't sell well because of its high price and the fact that its integer performance, important for general-purpose computing applications, was lacking compared to the 200-MHz R4400 that was being sold by then. It did, however, have impressive floating-point performance, which landed many R8000-based systems in the TOP500 supercomputer list for a time. But this design could never be the high-performance and general-purpose processor MTI needed to compete with their competitor's offerings...

Introduced in 1996, the MIPS R10000 (die IS pictured here) was a significant departure from the architecture of the R4000 (which more or less was directly derived from the first research done at Stanford University where MIPS was initially created over a decade earlier). Dropping the superpipeline approach, the R10000 is a 4-way superscalar processor even capable of executing instructions out of order! Another big change is that it has a branch predictor and speculatively executes instructions after a branch as opposed to the R4000, which used the classic MIPS "branch delay slot" technique to schedule one more instruction in the pipeline after a branch and then stall lol (they should have added even more delay slots, caring about binary compatibility is liberalism). It's hard to find benchmarks for something this old but this design performed at least several times faster than an R4400 at about the same clock speed!

If you like my CPU posting and want me to post more in the future let me know

Also ask me any questions if you want too and I'll try to answer

52
submitted 9 months ago by PaX@hexbear.net to c/technology@hexbear.net

CPU-posting on main

MTI = MIPS Technologies (company that made MIPS (Microprocessor without Interlocked Pipeline Stages) processors, they make RISC-V processors now lmao)

At the time when the MIPS R10000, known as the "T5" while in development, was being designed, MTI had made a name for themselves as designers of high-performance computer microprocessors along the lines of the then-new philosophy of reduced instruction set computing (RISC). Actually, their R2000 design was the first commercially-available RISC microprocessor. By the time the T5 was being designed, they were no longer alone in the RISC microprocessor market. Several companies, including IBM and Motorola (joined together in the AIM alliance which produced PowerPC), DEC (who designed the Alpha line of RISC microprocessors after MTI owned them in the 80s when their radically simpler chips were performing better than VAXen), and Sun Microsystems (who were making the SPARC line of microprocessors) were now marketing RISC microprocessors. Not just even marketing but beating MTI in the market they had created. After trying and failing to develop their own complete computer systems alongside their chips, they were having financial difficulties until Silicon Graphics acquired MTI to secure availability of MIPS microprocessors for their famous ("it's a Unix system, I know this!") MIPS-based workstations and servers. Although their new (in 1993) R4000 and R4400 designs performed well compared to their contemporaries, they were quickly being made obsolete by MTI's competitor's new offerings and they were left with a problem:

The MIPS R4000 and the R4400, which is essentially an R4000 with bigger on-die caches, were more or less just an architectural evolution from the R2000. The R4000 made its performance in much the same way as the R2000 did, the classic RISC design process mantra: "let's make it simpler" and thus be able to run it faster. In particular, what this means for the R4000, and what is a key difference from its predecessors and its contemporaries, is a technique called superpipelining. In an instruction pipeline, the maximum speed at which your processor can issue instructions is set by the pipeline stage which takes the longest to complete. Superpipelining is one way of addressing this problem: you can subdivide each pipeline stage into 2 simpler pipeline stages that individually complete faster and thus be able to clock your chip faster without problems. However, this has its limits. Eventually, it becomes impossible to further "deepen" the pipeline like this or clock the processor faster in general without other problems. This is why MTI's competitors opted for the analogous superscalar approach: you can duplicate functional units of your processor and have multiple instructions "in flight" at the same time and usually this also involves multiple pipelines. At the time MTI thought this approach would result in more consistently higher performance (not to mention save die space) but were quickly proven wrong when their competitor's superscalar (and often with other architectural tricks) chips were outperforming the R4000 in spite of MTI's fabrication partners constantly improving their process and releasing chips that ran at higher and higher speeds.

Enter the MIPS R8000 (die not pictured here) in 1994, a weird and expensive 6-chip 4-way superscalar design meant for the high-end microprocessor market while the next-generation T5 (which would become the MIPS R10000, as mentioned earlier) was under development. It didn't sell well because of its high price and the fact that its integer performance, important for general-purpose computing applications, was lacking compared to the 200-MHz R4400 that was being sold by then. It did, however, have impressive floating-point performance, which landed many R8000-based systems in the TOP500 supercomputer list for a time. But this design could never be the high-performance and general-purpose processor MTI needed to compete with their competitor's offerings...

Introduced in 1996, the MIPS R10000 (die IS pictured here) was a significant departure from the architecture of the R4000 (which more or less was directly derived from the first research done at Stanford University where MIPS was initially created over a decade earlier). Dropping the superpipeline approach, the R10000 is a 4-way superscalar processor even capable of executing instructions out of order! Another big change is that it has a branch predictor and speculatively executes instructions after a branch as opposed to the R4000, which used the classic MIPS "branch delay slot" technique to schedule one more instruction in the pipeline after a branch and then stall lol (they should have added even more delay slots, caring about binary compatibility is liberalism). It's hard to find benchmarks for something this old but this design performed at least several times faster than an R4400 at about the same clock speed!

If you like my CPU posting and want me to post more in the future let me know

Also ask me any questions if you want too and I'll try to answer

35
submitted 9 months ago* (last edited 9 months ago) by PaX@hexbear.net to c/chapotraphouse@hexbear.net

No, that was just a bit

Gosha is too powerful of a being to suffer from scurvy

6
Based Yugopnik (hexbear.net)
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/vegan@hexbear.net

Communism is the movement to abolish ALL oppressive systems, including systems that oppress animals and nature itself.

56
submitted 1 year ago* (last edited 4 months ago) by PaX@hexbear.net to c/games@hexbear.net

Edit edit: I had the mods unpin the post cuz we don't run the server anymore rn :(

Will make a new post if we reboot it


Edit: the server is live at byond://157.230.217.31:9999 !

Brief instructions:

Get the BYOND client, make an account, and log in.

Click "Space Station 13" in the game list.

Click this gear icon in the top right of the window:

Click open location and paste in the link at the top of the post starting with "byond://" and press OK. Then you should connect!


Me and @WithoutFurtherRelay@hexbear.net have been talking about running a Hexbear SS13 server for a bit and we just now got it in a working state for testing.

Around 4 PM US EST / 7 PM UTC I'll edit this post with the IP address so anyone who wants to play can join. It's okay if you haven't played before.

All you need to play is the BYOND client from here:

https://www.byond.com/

Come join us in running/blowing up our space station!

There may be a few technical problems we haven't foreseen yet but we'll deal with them if it happens.

Here is our Discord discussion group if you're interested:

https://discord.gg/Qcy6enC2h5

We are gonna replace it with something more secure and private sometime. Didn't we have a Matrix server once?

48
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/games@hexbear.net
[-] PaX@hexbear.net 63 points 1 year ago

The brave resistance of the Palestinian people gives me a bit of hope for our doomed world

60
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/chapotraphouse@hexbear.net
58
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/urbanism@hexbear.net

https://sovietmodernism.com/

"Hotel Cosmos"

"National Library of Kosova, Pristina"

"House of Unions, Minsk, Belarus"

"Ministry of Roads Building, Tbilisi, Georgia"

"Culture Palace of Railway Workers, Chisinau, Moldova"

104
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/technology@hexbear.net

On this day in 1983, a patent was granted to MIT for a new cryptographic algorithm: RSA. "RSA" stands for the names of its creators Rivest, Shamir, and Adlemen. RSA is a "public-key" cryptosystem. Prior to the creation of RSA, public-key cryptography was not in wide use.

Public-key cryptography

Cryptography is the study and practice of secure communication. Throughout most of its historical use, cryptographic techniques were entirely dependent on the involved parties already sharing a secret that could be used to reverse an encryption process. In early cryptography, the secret was itself the encryption process (for example, a Caesar cipher that substitutes letters in a secret message with letters a fixed number of steps down the alphabet). As cryptography became more systematic and widespread in use, it became necessary to separate cryptographic secrets from the cryptographic techniques themselves because the techniques could become known by the enemy (as well as static cryptographic schemes being more vulnerable to cryptanalysis). Regardless, there is still the issue of needing to share secrets between the communicating parties securely. This has taken many forms over the years, from word of mouth to systems of secure distribution of codebooks. But this kind of cryptography always requires an initial secure channel of communication to exchange secrets before an insecure channel can be made secure by the use of cryptography. And there is the risk of an enemy capturing keys and making the entire system worthless.

Only relatively recently has this fundamental problem been addressed in the form of public-key cryptography. In the late 20th century, it was proposed that a form of cryptography could exist where the 2 parties, seeking to communicate securely, could exchange some non-secret information (a "public" key) derived from privately held secret information (a "private" key), and use a mathematical function (a "trap-door" function) that is easy to compute in one direction (encryption) but hard to reverse without special information (decryption) to encipher messages to each other, using each other's respective public keys, that can't be easily decrypted without the corresponding private key. In other words, it should be easy to encipher messages to each other using a public key but hard to decrypt messages without the related private key. At the time this idea was proposed there was no known computationally-hard trap-door function that could make this possible in practice. Shortly after, several candidates and cryptosystems based upon them were described publicly πŸ‘, including one that is still with us today...

RSA

Ron Rivest, Adi Shamir, and Leonard Adleman at MIT had made many attempts to find a suitably secure trap-door function for creating a public-key cryptosystem over a year leading up to the publication of their famous paper in 1978. Rivest and Shamir, the computer scientists of the group, would create a candidate trap-door function while Adleman, the mathematician, would try to find a way to easily reverse the function without any other information (like a public key). Supposedly, it took them 42 attempts before they created a promising new trap-door function.

As described in their 1978 paper "A method for obtaining digital signatures and public-key cryptosystems", RSA is based upon the principle that factoring very large numbers is computationally difficult (for now!). The paper is a great read, if you're interested in these topics. The impact of RSA can't be overstated. The security of communications on the internet have been dependent on RSA and other public-key cryptosystems since the very beginning. If you check your browser's connection info right now, you'll see that the cryptographic signature attached to Hexbear's certificate is based on RSA! In the past, even the exchange of symmetric cipher keys between your web browser and the web server would have been conducted with RSA but there has been a move away from that to ensure the compromise of either side's RSA private keys would not compromise all communications that ever happened.

The future of RSA?

In 1994, a mathematician named Peter Shor, developed an algorithm for quantum computers that would be capable of factoring the large integers used in the RSA scheme. In spite of this, RSA has seen widespead and increasing use in securing communications on the internet. Until recently, the creation of a large enough quantum computer to run Shor's algorithm at sufficient scale was seen as very far off. With advances in practical quantum computers though, RSA is on its way out. Although current quantum computers are still a very long way off from being able to break RSA, it's looking more and more plausable that someone could eventually build one that is capable of cracking RSA. A competition being held by the US National Institute of Standards and Technology, similar to the one that selected the Advanced Encryption Algorithm, is already underway to select standard cryptographic algorithms that can survive attacks from quantum computers.

Megathreads and spaces to hang out:

reminders:

  • πŸ’š You nerds can join specific comms to see posts about all sorts of topics
  • πŸ’™ Hexbear’s algorithm prioritizes comments over upbears
  • πŸ’œ Sorting by new you nerd
  • 🌈 If you ever want to make your own megathread, you can reserve a spot here nerd
  • 🐢 Join the unofficial Hexbear-adjacent Mastodon instance toots.matapacos.dog

Links To Resources (Aid and Theory):

Aid:

Theory:

13
submitted 1 year ago by PaX@hexbear.net to c/technology@hexbear.net

cross-posted from: https://hexbear.net/post/621898

In this photo, you can see how much the on-die cache has expanded compared to its predecessors and other contemporary embedded microprocessors. Really foreshadowing the kind of optimizations that would become commonplace today. In addition to its very large (for the time) 4-way set associative 256kb on-die secondary cache, it featured a 16k primary instruction cache and 16k primary data cache. It was fabricated at a 250 nanometer feature size and could be clocked up to 263 MHz. With its dual-issue superscalar 5-stage pipeline, it could achieve a Dhrystone score of 450 DMIPS at 263 MHz, a impressive score for embedded microprocessors of the time, although this benchmark really doesn't show off its cache performance.

Anyway, hope you like the pretty die shot of this forgotten microprocessor.

9
deleted by creator (hexbear.net)
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/piracy@lemmy.dbzer0.com
13
NEC VR5000 die shot (hexbear.net)
submitted 1 year ago* (last edited 1 year ago) by PaX@hexbear.net to c/technology@hexbear.net

Fun fact: the R5900 used in the Playstation 2's Emotion Engine is a derivative of this MIPS IV-implementing microprocessor.

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PaX

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