Hello,
I am making an open source privacy-first fitness band for myself and I am writing the firmware now as someone relatively inexperienced at firmware development (I am an electronics engineer by trade). I get it done but sometimes I run into concept issues, especially when I start overthinking, like now that I need help with.
I have a macronix SPI NOR flash on-board that I want to use as offline activity saving, backup at low battery, etc... I am dreaming up the data structure for it. Here is the values I need to save to not lose information and what will be required for my supported features in the Bluetooth Physical Activity Monitor Service:
struct memory_map_nor {
time_t timestamp;
uint16_t sub_sess_id;
uint32_t steps: 24;
uint8_t bpm;
float16_t spo2;
uint16_t pulse_inter_beat_interval;
uint16_t cadence;
uint16_t speed;
uint16_t activity_level;
uint16_t activity_type;
uint16_t temp;
};
So from this datastructure, it has a total of 28 bytes of data. This has to fit on a 256 byte page, which means 9 "rows" of data can be written per page, 144 per sector, 2304 per 64 bit block, and 147456 in total for a 32Mbit NOR.
But, I am getting confused while reading about memory structures in "normal" processors that need to read everything in 4/8-byte words via the parallel interfaces. This means that conventionally, everything has to be padded to neat structures that are divisible by 4 (32-bit) for QSPI reading. In that case, I would either have to add another 32 bits of data or pad 32 bits to every "row", making a neat 8 data "rows" per page.
OR, because I am only using single lane SPI, would this not matter and I could shove an extra datapoint in each page. The difference is 147456 data rows vs 131072 data rows. At 3s polling rate, that is 5.12 days vs 4.55 days. For my application, the difference might be useless anyway, but the band goal battery life is 2 weeks or so.
Again, maybe I am overthinking this and can just pad the data to make everything neat and fit well. Anyone have any opinions? Thanks!
My recommendation is that you use a file system like littlefs which also has wear leveling built-in, and you don't have to worry about any specifics of the chip
Hmmm, I used littlefs for SD card writing at work with an STM32F0 chip. It was hell working with files when tons of essential functions like appending and seeking simply didn't work in the STM HAL... Plus dealing with opening and closing files and appending files and having to seek in them to find what you want, parsing results, cleaning old files, etc... compared to simple circular buffer and a start and end address of relevant data that can be erased once every day or week depending on use. Even with a daily erase of the NOR chip, they are rated for 100k program/erase cycles which would be over 250 years before degradation starts. I am not dealing with a ton of data nor the flexibility of a full UI/ app storage where I would definitely just use littlefs.