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submitted 8 months ago by yogthos@lemmy.ml to c/technology@lemmy.ml
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[-] Faceman2K23@discuss.tchncs.de 23 points 8 months ago

I mean, we know the absolute limits of computational efficiency thanks to the Landauer limit and the Margolus–Levitin theorem, and from those we know that we are so far from the limits that it is practically unfathomable.

If they can show some evidence that they can perform useful calculations 100x more efficiently than whatever they chose to compare against (definitely a cherry picked comparison) then I'll give them my attention, but others have made similar claims in the past then turned out to be in extremely specific algorithms that use quantum calculations that are of course slower and less efficient on any traditional computer.

[-] yogthos@lemmy.ml 0 points 8 months ago

I'd like to see these chips benchmarked in the wild as well before getting too excited, but the claims aren't that implausible. Incidentally, this approach is why M series chips are so much faster than x86 ones. Apple uses SoC architecture which eliminates the need for the bus, and they process independent instructions in parallel on multiple cores. And they're just building that on existing ARM architecture. So, it's not implausible that a chip and a compiler designed for this sort of parallelism from ground up could see a huge performance boost.

[-] krolden@lemmy.ml 3 points 8 months ago

Thats not why Apple silicon is faster. Every modern mobile device uses a SoC these days.

[-] yogthos@lemmy.ml 4 points 8 months ago* (last edited 8 months ago)

It is very much part of the reason it's faster than the traditional x86 architecture with a bus, which is what I was talking about. Here's a good summary for you https://archive.is/DtT7c

[-] krolden@lemmy.ml 3 points 8 months ago

Sorry I thought you meant its more efficient just because its a SoC.

this post was submitted on 13 Mar 2024
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